Module 6 – How to Design Comparators


This module deals with CMOS comparator design.


This module consists of the following lecture topics:

  • Single-stage, folded-cascade, and two-stage open loop comparator design
  • Design of improved open loop comparators
  • Design of asynchronous (clocked) comparators

The module also consists of the following laboratories:

  • Laboratory 8 – Open Loop Comparator Design
  • Laboratory 9 – Design of a Comparator with Hysteresis
  • Laboratory 10 – High Speed Comparator Design


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