This lecture shows how to design the bias current in a common source NMOS or PMOS transistor that is independent of VDD. Two step-by-step design procedures are introduced and illustrated with an example. These design procedures, BV1 and BV2, will be used in following lectures on How to Design Bias Circuits. This lesson is the same as Lesson 1.5 in Module 1 of the Professional Courses.
Lecture Notes